Analog Design Engr, II Jobs in Bangalore - Synopsys Inc

Analog Design Engr II

Synopsys Inc

3 Years

Not disclosed

Expired

Posted: 08 Jul 20

Job Description

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

Our Silicon Design & Verification business is all about building high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules.

A/MS Circuit Design Engineer (Standard Cell Library)

We’re looking for an A/MS Circuit Design Engineer to join the team. Does this sound like a good role for you?

This role involves analyzing various mixed signal techniques for dynamic and static power reduction, performance enhancement and area reduction. You’d leverage your strong understanding of circuit simulation and circuit layout as well as knowledge of bipolar, CMOS, passive structure, and interconnect failure modes.

Responsibilities Include But Not Limited To The Following

Architectural definition and changes w.r.t. Standard Cell libraries in various technologies in line with Design Flows.
Understanding of deep submicron device physics to account for these non-ideal effects during cell design.
Should have worked on Standard cells libraries especially sub-60nm. Exposure to chip-level scenarios is a plus.
Take ownership for the improvement/development of circuits and layouts of Standard Cell libraries.
Implement innovative solutions in the Standard Cell domain which are in line with Synopsys business needs.
Review and validation of various Standard Cell BE and EDA views within the project.

Key Qualification

BE+3 years of relevant experience / MTech+2 years of relevant experience in Electrical Engineering or Computer Engineering or other relevant field of study.

3 Years Of Relevant Experience In

Preferred Experience:

Digital Standard Cell library development.
Understanding of deep submicron device physics to account for these non-ideal effects during cell design.
Should have worked on Standard cells libraries design especially sub-28nm. Exposure to chip-level scenarios is a plus
Review and validation of various Standard Cell BE and EDA views within the project.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.