Senior Design Engineer Jobs in Hyderabad - Xilinx Inc.
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Job Description
Senior Design Engineer 2
157991
Hyderabad, India, India
Education Requirements BE / MS in EE
Years of Experience 5+
JOB DESCRIPTION:
• Executing Static timing analysis of hierarchical designs at top level
• Debug timing constraint issues, make edits to fix them
• Debug timing QOR issues in primetime
• Timing, Noise ECO creation using PT ECO, Tweaker , SMVA, Hyperscale
• Create automation scripts to extract timing data generation using Perl/TCL
• Understand and analyze primetime reports - check_timing, analysis_coverage, report_qor, report_constraints,
JOB REQUIREMENTS:
• Should be hands on STA Flow experience
• Good flow understanding.
• Must have strong debugging skills- timing issues, SDC , clock propogation
• Must Worked on multiple tapeout timing closure at full chip
Job Particulars
Role engineer core non it
Who can apply Experienced (3+ Years)
Hiring Process Face to Face Interview
Employment TypeFull Time
Job Id788396
Job Category Core Technical , 1 to 3 Yr Exp
Locality Address
State Telangana
Country India
About Company
Xilinx is the inventor of the FPGA, programmable SoCs, and now, the ACAP. Our highly-flexible programmable silicon, enabled by a suite of advanced software and tools, drives rapid innovation across a wide span of industries and technologies - from consumer to cars to the cloud. Xilinx delivers the most dynamic processing technology in the industry, enabling rapid innovation with its adaptable, intelligent computing.
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