BEL jobs for Deputy Manager/Senior Engineer in Bangalore. Last Date to apply: 20 Jan 2018

Advertisement # 04/ICDC/PD&IC

Deputy Manager/Senior Engineer  recruitment in Bharat Electronics Limited (BEL)

Job Code: E24- ICDC/04  Deputy Manager/ 1 Post

Post Qualification Work experience: The candidate shall have post qualification work experience in the following relevant areas: 1) Full Custom Analog/RF/Mixed Signal IC Design experience in CMOS / BiCMOS/Bipolar/SiGe technologies. 2) Experience in handling full chip tape-outs desirable. 3) The candidate must be able to handle all aspects of Analog / RF/Mixed Signal design, from specification review to simulation, layout, and prototype testing. 4) Knowledge of Semi/Full Custom EDA Tool Flows: Cadence/ Synopsis/Mentor Graphics 5) Good understanding of Layout techniques and parasitic effects. 6) Post Silicon Validation Experience is desirable NOTE: Proof for work experience for Sl. No. 1 to 6 above, to be attached along with the application

Pay Scale : Rs.60000 - 180000

E24- PD&IC/04 /1 Post

Qualification:  Ph.D in relevant area from AICTE approved Institution / University . Experience: 3 Years

Post Qualification Work experience:  The candidate shall have post qualification work experience in the following relevant areas: 1) RF IC design and development, RF circuit design, RF simulation, verification, testing of RF subsystems, knowledge of RF instruments. 2) Experience in using RF / Microwave Circuit & System Simulation tools such as ADS, AWR, CST and EM tools like HFSS or Momentum. 3) Ability to handle all aspects of RF Power amplifier designs (using switches, combiners, RF driver amplifiers, power amplifier devices, matching, biasing circuits), from specification review to simulation, layout and prototype testing. NOTE: Proof for work experience for Sl. No. 1 to 3 above, to be attached along with the application

Age: 36 years

Senior Engineer, E23- ICDC/04 /2 Posts

Qualification: M.E/M.Tech in VLSI Design /related specialization or related specialization from any AICTE approved institution / University, NITs, IITs with First Class for GEN / OBC candidates & Pass Class for SC/ST/PWD Candidates. MS from AICTE approved Institutions/University in the relevant specialisation.

Experience: 2 Years

Post Qualification Work experience: The candidate shall have post qualification work experience in the following relevant areas: 1) Full Custom Analog /RF/Mixed Signal IC Design experience in CMOS/BiCMOS/Bipolar/SiGe technologies. 2) Experience in Design and Simulation of Analog/RF/Mixed Signal Building Blocks. 3) Knowledge of Semi/Full Custom EDA Tool Flows: Cadence/ Synopsis/Mentor Graphics 4) Good understanding of Layout techniques and parasitic effects. NOTE: Proof for work experience for Sl. No. 1 to 4 above, to be attached along with the application.

E23- PD&IC/04 /2 Posts

Qualification:  M.E/M.Tech in RF/Microwave Engineering or related specialization from any AICTE approved institution / University, NITs, IITs with First Class for GEN / OBC candidates & Pass Class for SC/ST/PWD Candidates. MS from AICTE approved Institutions/University in the relevant specialisation.  Experience: 2 Years

Post Qualification Work experience: The candidate shall have post qualification work experience in the following relevant areas: 1) Knowledge of RF circuit design, RF simulation and EM simulation tools: ADS, AWR, and HFSS etc, verification and testing 2) Power Amplifier circuit design, RF simulation, PCB design for RF circuits, high power testing, knowledge of RF test instruments. 3) Test, troubleshoot, and characterization of active and passive RF MMICs and devices required for design of power amplifiers and similar subsystems. NOTE: Proof for work experience for Sl. No. 1 to 3 above, to be attached along with the application.

Age:  32 years

Deputy Engineer. E22- ICDC/04/ 2 Posts

Qualification:  Full time B.E/B.Tech in Electronics / Electronics & Telecommunication / Electronics & Communication / Communication / Telecommunication from any AICTE approved Institution / University with First Class for GEN / OBC candidates & Pass Class for SC/ST/PWD Candidates.  Experience: 1 Year

Post Qualification Work experience: The candidate shall have post qualification work experience in the following relevant areas: 1) Hands on experience in Full Custom layout design of analog /RF building blocks. 2) Experience in running DRC, LVS for Block Level and Full Chip. 3) Knowledge of Semi/Full Custom EDA Tool Flows: Cadence/ Synopsis/Mentor Graphics NOTE: Proof for work experience for Sl. No 1 to 3 above, to be attached along with the application

Age: 28 years

Mode of Selection: Selection will be through a Written Test followed by an Interview for only those candidates who qualify in the written test.

Application Fee: An application fee of Rs.500/- needs to be remitted through Online mode i.e. SBI Collect OR  SBI Branch.